Job Description:

Participate architecture design ofleading edge deep learning computing platform.

Cooperating with algorithm team, implement and optimize deep learning algorithm on FPGA.

Research parameter matrix compression and power reduction techndivogy for FPGA deep learning module.

Joint development of medical image analysis system or ADAS system.

Requirement:

Master or above degree in EECSor related majors.

More than 3 year work experience in FPGA design or digital IC design.

Familiar with Verilog or VHDL.

Familiar with C++ or Python is preferred.

Familiar with deep learning ( CNN or DNN) or image processing is preferred.

Familiar with ARM architecture and embedded software development is preferred.

Self-motivated and good team cooperation.

公司电话：010-62981512

简历投递邮箱：hr@ideepwise.ai

简历投递方式：姓名+专业+岗位名称

地点：海淀区上地信息路12号中关村发展大厦